I'm creating a virtual computer that can process its own pseudo-assembly instruction set.
Basically I have a structure like this:
Code:
struct cpu
{ /* structure for registers of virtual cpu */
int ax; /* address register */
int bx; /* address register */
int cx; /* numerical register */
int dx; /* numerical register */
char fl; /* flag */
char sp; /* stack pointer */
int st[10]; /* stack */
int ip; /* instruction pointer */
};
Then a group of instructions:
Code:
struct command
{
int opcode, operand1, operand2;
};
std::vector<command> algo; //Not actually here, but you get the idea
The actual opcodes are defined in a switch case like:
Code:
switch(hotcommand.opcode)
{
case MOV:
//Code to for MOV
The problem is here with the code for MOV. For this to work like I had imagined the operands for an address like ax would need to be pointers to the actual register, or something.
If this isn't clear, then please ask, and I'll try to clarify.
Thanks,
David