It rapidly flash 30, then 20, then 10. Below is my whole code
Code:
#include "msp430x22x4.h"
#include "mrfi.h"
#define MRFI_RADIO_FAMILY1
int count=0;
void main(void)
{
WDTCTL = WDTPW + WDTHOLD;
BSP_Init();
MRFI_Init();//initalize 6 pin wire connection between cc2500 & msp430
MRFI_WakeUp();//wakes radio up
MRFI_RxOn();//turn radio into receiving mode
TACCTL0 = CCIE;
TACCR0 = 37500;
TACTL = TASSEL_2 + MC_1 + ID_3;
P1DIR |= 0x03; // P1DIR = P1DIR | 0x03 Set P1.0, P1.1 to output direction
P1OUT &= ~0x03;
__bis_SR_register(GIE);
for (;;)
{
if(count>=0&&count<=15)
{
TACCR0 =37500; // Delay to allow Ref to settle
TACCTL0 |= CCIE; // Compare-mode interrupt.
ADC10CTL0 = SREF_0 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE;//using Vcc and gnd for reference, 64 clks/sample, turn ADC on and enable interrupts
ADC10CTL1 = INCH_0;
ADC10AE0 |= 0x01;
ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start
__bis_SR_register(CPUOFF + GIE); // LPM0, ADC10_ISR will force exit
if (ADC10MEM <0x50)
{
P1OUT |= 0x01;
P1OUT &= ~0x02;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='A';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
else if (ADC10MEM > 0x50)
{
P1OUT |= 0x02;
P1OUT &= ~0x01;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='X';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
ADC10CTL0 &= ~ENC; // Clear ENC to stop conversion
ADC10CTL0 = 0;
}
else if(count>=16&&count<=30)
{
TACCR0 = 37500; // Delay to allow Ref to settle
TACCTL0 |= CCIE; // Compare-mode interrupt.
ADC10CTL0 = SREF_0 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE;//using Vcc and gnd for reference, 64 clks/sample, turn ADC on and enable interrupts
ADC10CTL1 = INCH_1;
ADC10AE0 |= 0x02;
ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start
__bis_SR_register(CPUOFF + GIE); // LPM0, ADC10_ISR will force exit
ADC10AE0 |= 0x02; // P2.1 ADC option select
if (ADC10MEM <0x50)
{
P1OUT |= 0x01;
P1OUT &= ~0x02;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='W';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
else if (ADC10MEM > 0x50)
{
P1OUT |= 0x02;
P1OUT &= ~0x01;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='Y';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
ADC10CTL0 &= ~ENC; // Clear ENC to stop conversion
ADC10CTL0 = 0;
}
else if(count>=31&&count<=45)
{
TACCR0 = 37500; // Delay to allow Ref to settle
TACCTL0 |= CCIE; // Compare-mode interrupt.
ADC10CTL0 = SREF_0 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE;//using Vcc and gnd for reference, 64 clks/sample, turn ADC on and enable interrupts
ADC10CTL1 = INCH_2;
ADC10AE0 |= 0x04;
ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start
__bis_SR_register(CPUOFF + GIE); // LPM0, ADC10_ISR will force exit
ADC10AE0 |= 0x04; // P2.2 ADC option select
if (ADC10MEM <0x50)
{
P1OUT |= 0x01;
P1OUT &= ~0x02;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='E';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
else if (ADC10MEM > 0x50)
{
P1OUT |= 0x02;
P1OUT &= ~0x01;
mrfiPacket_t packet;
packet.frame[9]=' ';
packet.frame[0]=8+20;
packet.frame[9]='Z';
MRFI_Transmit(&packet,MRFI_TX_TYPE_FORCED);
}
ADC10CTL0 &= ~ENC; // Clear ENC to stop conversion
ADC10CTL0 = 0;
}
}
}
#pragma vector=ADC10_VECTOR
__interrupt void ADC10_ISR(void)
{
__bic_SR_register_on_exit(CPUOFF); // Clear CPUOFF bit from 0(SR)
}
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
if (count == 45)
{
count = 1;
}
else
{
count++;
}
}
void MRFI_RxCompleteISR()
{
}
#include "msp430x22x4.h"
#include "mrfi.h"
#define MRFI_RADIO_FAMILY1
#define P3_set_out P2DIR |=0x01;//set Pin 3 and pin 4 to output
#define P4_set_out P2DIR |=0x02;
#define a_set_out P2DIR |=0x04;//set P2.2 output direction
#define b_set_out P2DIR |=0x08;//set P2.3 output direction
#define c_set_out P2DIR |=0x10;//set P2.4 output direction
#define d_set_out P4DIR |=0x08;//set P4.3 output direction
#define e_set_out P4DIR |=0x10;//set P4.4 output direction
#define f_set_out P4DIR |=0x20;//set P4.5 output direction
#define g_set_out P4DIR |=0x40;//set P4.6 output direction
#define a_on P2OUT |=0x04;
#define a_off P2OUT &=~0x04;
#define b_on P2OUT |=0x08;
#define b_off P2OUT &=~0x08;
#define c_on P2OUT |=0x10;
#define c_off P2OUT &=~0x10;
#define d_on P4OUT |=0x08;
#define d_off P4OUT &=~0x08;
#define e_on P4OUT |=0x10;
#define e_off P4OUT &=~0x10;
#define f_on P4OUT |=0x20;
#define f_off P4OUT &=~0x20;
#define g_on P4OUT |=0x40;
#define g_off P4OUT &=~0x40;
int num,num_1,num_2,r_1,count=0;
void main(void)
{
WDTCTL = WDTPW + WDTHOLD;
BSP_Init();
P1REN|=0x04;
P1IE|=0x04;
MRFI_Init();//initalize 6 pin wire connection between cc2500 & msp430
MRFI_WakeUp();//wakes radio up
MRFI_RxOn();//turn radio into receiving mode
TBCTL=TBSSEL_2+MC_1+ID_3;
TBCCTL0=CCIE;
TBCCR0=150;
__bis_SR_register(LPM0_bits+GIE);
P1DIR |= 0x03; // P1DIR = P1DIR | 0x03 Set P1.0, P1.1 to output direction
P1OUT &= ~0x03;
/*TBCTL=TBSSEL_2+MC_1+ID_3;
TBCCTL0=CCIE;
TBCCR0=150;*/
__bis_SR_register(GIE);
for(;;)
{
}
}
void MRFI_RxCompleteISR()
{
mrfiPacket_t packet;
MRFI_Receive(&packet);
if(packet.frame[9]=='A')
{
P1OUT |= 0x01;
P1OUT &=~0x02;
P2OUT &=~0x03;
P4DIR |=0x20;
P4OUT |=0x20;
packet.frame[9]=' ';
a_set_out;//set P2.2->segment A as output pin
b_set_out;//set P2.3->segment B as output pin
c_set_out;//set P2.4->segment C as output pin
d_set_out;//set P4.3->segment D as output pin
e_set_out;//set P4.4->segment E as output pin
f_set_out;//set P4.5->segment F as output pin
g_set_out;//set P4.6->segment G as output pin
num_1=(20/10);
r_1=20%10;
num_2=r_1/1;
if(count>=0&&count<=4)
{
P2OUT &=~0x03;
P2OUT |=0x01;
num=num_1;
}
if(count>=5&&count<=10)
{
P2OUT &=~0x03;
P2OUT |=0x02;
num=num_2;
}
packet.frame[9]=' ';
switch(num)
{
case 0:
a_on;
b_on;
c_on;
d_on;
e_on;
f_on;
g_off;
break;
case 1:
a_off;
b_on;
c_on;
d_off;
e_off;
f_off;
g_off;
break;
case 2:
a_on;
b_on;
c_off;
d_on;
e_on;
f_off;
g_on;
break;
case 3:
a_on;
b_on;
c_on;
d_on;
e_off;
f_off;
g_on;
break;
case 4:
a_off;
b_on;
c_on;
d_off;
e_off;
f_on;
g_on;
break;
case 5:
a_on;
b_off;
c_on;
d_on;
e_off;
f_on;
g_on;
break;
case 6:
a_on;
b_off;
c_on;
d_on;
e_on;
f_on;
g_on;
break;
case 7:
a_on;
b_on;
c_on;
d_off;
e_off;
f_off;
g_off;
break;
case 8:
a_on;
b_on;
c_on;
d_on;
e_on;
f_on;
g_on;
break;
case 9:
a_on;
b_on;
c_on;
d_off;
e_off;
f_on;
g_on;
break;
}
}
else if(packet.frame[9]=='W')
{
P1OUT &= ~0x01;
P1OUT |= 0x02;
P2OUT &=~0x03;
P4DIR |=0x20;
P4DIR |=0x40;
P4OUT |=0x20;
P4OUT |=0x40;
packet.frame[9]=' ';
a_set_out;//set P2.2->segment A as output pin
b_set_out;//set P2.3->segment B as output pin
c_set_out;//set P2.4->segment C as output pin
d_set_out;//set P4.3->segment D as output pin
e_set_out;//set P4.4->segment E as output pin
f_set_out;//set P4.5->segment F as output pin
g_set_out;//set P4.6->segment G as output pin
num_1=(10/10);
r_1=10%10;
num_2=r_1/1;
if(count>=0&&count<=4)
{
P2OUT &=~0x03;
P2OUT |=0x01;
num=num_1;
}
if(count>=5&&count<=10)
{
P2OUT &=~0x03;
P2OUT |=0x02;
num=num_2;
}
packet.frame[9]=' ';
switch(num)
{
case 0:
a_on;
b_on;
c_on;
d_on;
e_on;
f_on;
g_off;
break;
case 1:
a_off;
b_on;
c_on;
d_off;
e_off;
f_off;
g_off;
break;
case 2:
a_on;
b_on;
c_off;
d_on;
e_on;
f_off;
g_on;
break;
case 3:
a_on;
b_on;
c_on;
d_on;
e_off;
f_off;
g_on;
break;
case 4:
a_off;
b_on;
c_on;
d_off;
e_off;
f_on;
g_on;
break;
case 5:
a_on;
b_off;
c_on;
d_on;
e_off;
f_on;
g_on;
break;
case 6:
a_on;
b_off;
c_on;
d_on;
e_on;
f_on;
g_on;
break;
case 7:
a_on;
b_on;
c_on;
d_off;
e_off;
f_off;
g_off;
break;
case 8:
a_on;
b_on;
c_on;
d_on;
e_on;
f_on;
g_on;
break;
case 9:
a_on;
b_on;
c_on;
d_off;
e_off;
f_on;
g_on;
break;
}
}
else if(packet.frame[9]=='E')
{
P1OUT |= 0x01;
P1OUT |= 0x02;
P4DIR |=0x20;
P4DIR |=0x40;
P4OUT |=0x20;
P4OUT |=0x40;
P3_set_out;
P4_set_out;
a_set_out;//set P2.2->segment A as output pin
b_set_out;//set P2.3->segment B as output pin
c_set_out;//set P2.4->segment C as output pin
d_set_out;//set P4.3->segment D as output pin
e_set_out;//set P4.4->segment E as output pin
f_set_out;//set P4.5->segment F as output pin
g_set_out;//set P4.6->segment G as output pin
num_1=(30/10);
r_1=30%10;
num_2=r_1/1;
if(count>=0&&count<=4)
{
P2OUT &=~0x03;
P2OUT |=0x01;
num=num_1;
}
if(count>=5&&count<=10)
{
P2OUT &=~0x03;
P2OUT |=0x02;
num=num_2;
}
packet.frame[9]=' ';
switch(num)
{
case 0:
a_on;
b_on;
c_on;
d_on;
e_on;
f_on;
g_off;
break;
case 1:
a_off;
b_on;
c_on;
d_off;
e_off;
f_off;
g_off;
break;
case 2:
a_on;
b_on;
c_off;
d_on;
e_on;
f_off;
g_on;
break;
case 3:
a_on;
b_on;
c_on;
d_on;
e_off;
f_off;
g_on;
break;
case 4:
a_off;
b_on;
c_on;
d_off;
e_off;
f_on;
g_on;
break;
case 5:
a_on;
b_off;
c_on;
d_on;
e_off;
f_on;
g_on;
break;
case 6:
a_on;
b_off;
c_on;
d_on;
e_on;
f_on;
g_on;
break;
case 7:
a_on;
b_on;
c_on;
d_off;
e_off;
f_off;
g_off;
break;
case 8:
a_on;
b_on;
c_on;
d_on;
e_on;
f_on;
g_on;
break;
case 9:
a_on;
b_on;
c_on;
d_off;
e_off;
f_on;
g_on;
break;
}
}
else if(packet.frame[9]=='X')
{
//P1OUT |= 0x02;
P1OUT &=~0x01;
P4OUT &=~0x20;
P4OUT &=~0x40;
packet.frame[9]=' ';
}
else if(packet.frame[9]=='Y')
{
//P1OUT |= 0x02;
P1OUT &=~0x01;
P4OUT &=~0x20;
P4OUT &=~0x40;
packet.frame[9]=' ';
}
else if(packet.frame[9]=='Z')
{
//P1OUT |= 0x02;
P1OUT &=~0x01;
P4OUT &=~0x20;
P4OUT &=~0x40;
packet.frame[9]=' ';
}
}
#pragma vector =PORT1_VECTOR
__interrupt void Port_1(void)
{
P1IFG&=~0x04;
//BUZZER
}
#pragma vector=TIMERB0_VECTOR
__interrupt void TB0_ISR(void)
{
if (count == 10)
{
count = 0;
}
else
{
count++;
}
}