Makefiles depending on other makefiles

[_Mike]

I've been trying to get GNU make to work with a root dir Makefile and a subdir Makefile..
I've written my Makefiles based on The GNU C Programming Tutorial but I can't figure out how to solve this.
If I run make from the subdir then it works fine for that subdir's target. But if I run make from the top level dir it doesn't detect that one of the dependences of the subdir's Makefile has changed.

For example:
In subdir:

~/os/kernel $ make
make: `kernel' is up to date.

~/os/kernel $ touch kernel.h

~/os/kernel $ make
/usr/local/cross/bin/x86_64-elf-g++ -m32 -Wall -Wextra -Werror -nostdlib -nostar
tfiles -nodefaultlibs -o kernel_main.o -c kernel_main.cpp
/usr/local/cross/bin/x86_64-elf-g++ -m32 -Wall -Wextra -Werror -nostdlib -nostar
tfiles -nodefaultlibs -o kernel_printf.o -c kernel_printf.cpp
/usr/local/cross/bin/x86_64-elf-ld -melf_i386 -T kernel.ld  -o kernel kernel_loa
der.o kernel_main.o kernel_printf.o

In parent directory:

~/os $ make
make: `kernel/kernel.build' is up to date.

~/os $ touch kernel/kernel.h

~/os $ make
make: `kernel/kernel.build' is up to date.

Directory structure:

./kernel/kernel <-- Target for subdir Makefile
./kernel/kernel.build <-- Dummy target for top level Makefile
./kernel/Makefile <-- subdir Makefile
./kernel/(.cpp and .h files)
./Makefile <-- top level Makefile

./Makefile:

MOUNTSCRIPT=scripts/mount_vdisk.diskpart
UNMOUNTSCRIPT=scripts/unmount_vdisk.diskpart
COPYSCRIPT=scripts/copy_to_vdisk.sh

kernel/kernel.build : kernel/kernel
	diskpart /s $(MOUNTSCRIPT)
	sh $(COPYSCRIPT)
	diskpart /s $(UNMOUNTSCRIPT)
	touch kernel/kernel.build

# what do I put here as dependency?
kernel/kernel :
	make -C kernel

./kernel/Makefile:

ASM=yasm
CPP=/usr/local/cross/bin/x86_64-elf-g++
LD=/usr/local/cross/bin/x86_64-elf-ld
ASMFLAGS=-felf
CCFLAGS=-Wall -Wextra -Werror -nostdlib -nostartfiles -nodefaultlibs
LDFLAGS=-melf_i386 -T kernel.ld 
OBJS=kernel_main.o kernel_printf.o

kernel : kernel_loader.o $(OBJS)
	$(LD) $(LDFLAGS) -o $@ kernel_loader.o $(OBJS)
	
$(OBJS) : kernel.h

kernel_loader.o : kernel_loader.asm
	$(ASM) $(ASMFLAGS) -o kernel_loader.o kernel_loader.asm

%.o : %.cpp
	$(CPP) -m32 $(CCFLAGS) -o $@ -c $<

Do I have to duplicate all the dependencies from the kernel/Makefile in the top level one?
This is running under cygwin by the way, not that I think it should matter.

[tabstop]

I'm guessing you probably want to use include: Include - GNU `make'

[bernt]

Call the subdirectory's make every time, and let the subdir decide whether its dependencies are up-to-date on its own.

[_Mike]

Thank you both.
I ended up using the 'FORCE' way. Include also worked, but it made things a bit trickier to use with relative paths in the subdir makefile.