Design Issue, Your Thoughts Wanted

I'm creating a virtual computer that can process its own pseudo-assembly instruction set.
Basically I have a structure like this:

Code:

---

struct cpu
{  /* structure for registers of virtual cpu */
    int  ax;  /* address register */
    int  bx;  /* address register */
    int  cx;  /* numerical register */
    int  dx;  /* numerical register */
    char  fl;  /* flag */
    char  sp;  /* stack pointer */
    int  st[10];  /* stack */
    int  ip;  /* instruction pointer */
};

---

Then a group of instructions:

Code:

---

struct command
{
    int opcode, operand1, operand2;
};
std::vector<command> algo; //Not actually here, but you get the idea

---

The actual opcodes are defined in a switch case like:

Code:

---

switch(hotcommand.opcode)
{
    case MOV:
          //Code to for MOV

---

The problem is here with the code for MOV. For this to work like I had imagined the operands for an address like ax would need to be pointers to the actual register, or something.

If this isn't clear, then please ask, and I'll try to clarify.

Thanks,
David

Make sure you ask an actual question.

It doesn't quite sound like a design issue, but more like a "how can I do this?" problem.

Why do they need to point to registers? Since you're emulating the machine, the registers might as well be stored in memory, which is what you have now.
Btw, the stack is pretty small too. It should at least be around a MB.

Sorry it isn't very clear. Say you have the command:
mov ax,cx

Well I have a switch statement that switches depending on the command, but in the instruction, "ax" and "cx" are just, mmm references? So would I have to say if "cx" then we are actually talken about CPU.cx. Is that a necessary step, or is there a better way I could do this?

Obviously, part of your decoding of your instruction will involve figuring out what the arguments for this particular instruction is, in your example ax and cx.

One way to achieve that would be to, when you decode the instruction, you create a pointer to the source and destination register, e.g.:

Code:

---

    switch(srcRegNo)
    {
      case RegNoAX:
          src = &CPU.ax;
          break;
    ....
    }
    switch(dstRegNo)
    {
      ... Same as above
    }

---

--
Mats

OK, I see. Thanks for the reassurance.