Thread: RDMSR: Segmentation fault

Hi,

I was writing some code to read the internal temperature sensor of an Intel Core2 Duo processor which requires to read some MSRs.
When I tried to read a MSR with inline assembly code I always ended up getting a "Segmentation fault". Here's the code I used:

Code:

#define rdmsr(msr,val1,val2) __asm__ __volatile__("rdmsr" : "=a" (val1), "=d" (val2) : "c" (msr))

Searching google in order to identify the problem I found out that writing and reading MSRs is only possible for the kernel because it needs to executed from within protection ring 0.

I understand that writing a MSR shouldn't be possible from userspace, but why does reading a MSR require running in protection ring 0?

BTW: I am using /dev/cpu/*/msr instead now, but I'm curious to know why reading a MSR is such a problem...

Peter

Originally Posted by pgzh

BTW: I am using /dev/cpu/*/msr instead now, but I'm curious to know why reading a MSR is such a problem...

MSR means "model specific register." That means Intel does not intend to fully specify the behavior of this instruction at any one point in time. In other words, it's a catch-all where they can implement new stuff that doesn't really fit anywhere else.

So clearly, this instruction must be limited to ring 0. If it were not, then it would be useless when they want to implement some kind of privileged operation. Why would they tie their own hands like that?

This is definitely true for writing to a MSR, but is there any point in making reading one a privileged operation here?

Peter

Originally Posted by pgzh

This is definitely true for writing to a MSR, but is there any point in making reading one a privileged operation here?

I think the same argument still applies, which is that Intel might want to create a RDMSR instruction which returns some privileged piece of information. We can't know what they might want to do in the future.

I think it's hokey, too. Intel is struggling with shrinking opcode space in x86.

Fair enough, you really got a point here.
So I'll simply stick with the /dev/cpu/*/msr interface which is sufficient for my needs.

Thanks for the info!

Peter