I have some basic questions about makefile. The makefile I wrote looks like this
cardItem.h is linked with card.h ie. inside cardItem.h I have #include "card.h". Does that mean the dependence list of cardItem.o also need to include card.h and card.cpp?
CC = g++
target = card.exe
all : $(target)
$(target) : main.o card.o cardItem.o
$(CC) -Wall main.o card.o cardItem.o -o $(target)
card.o : card.h card.cpp
$(CC) -c card.cpp card.h
cardItem.o : cardItem.cpp cardItem.h
$(CC) -c cardItem.cpp cardItem.h
-rm *.o $(target)
Also do I need to have -Wall for card.o and cardItem.o in order to have the compile check all the code?