Hi
while running the code as attached
I am getting the following error
C:/Xilinx/Vivado_HLS/2015.4/win64/tools/systemc/include/sysc/communication/sc_fifo.h:314:13: error: no match for 'operator<<' in 'os << *(((cmd*)((const sc_core::sc_fifo<cmd>*)this)->sc_core::sc_fifo<cmd>::m_buf) + ((unsigned int)(((unsigned int)i) * 16u)))
Can anyone please help
here is my code
Code:
#include "systemc.h"
enum state {ADD, SUB, MULT, DIV};
class cmd{
public:
state command;
int op_1;
int op_2;
int cmd_id;
cmd() : command(ADD), op_1(0), op_2(0), cmd_id(0) {};
cmd (state c,int d0,int d1,int id):
command(c), op_1(d0),op_2(d1),cmd_id(id) {};
};
///////////////////////////////////////////////////
#include "systemc.h"
#include "cmd.h"
SC_MODULE(arith){
sc_port<sc_fifo_in_if<cmd> > data_in;
sc_port<sc_fifo_out_if<cmd> > data_out;
sc_fifo<cmd> result_buffer;
void write_result (cmd&, sc_int<64>&);
void return_proc();
void arith_proc();
SC_CTOR(arith) {
SC_THREAD(return_proc);
// SC_THREAD(arith_proc);
}
};
//////////////////////////////////////////
void arith::arith_proc()
{
cmd tmp_reg;
sc_int<64> result;
// wait to get off time zero
wait(1, SC_NS);
while (true) {
// Get the next command
tmp_reg = data_in->read();
switch (tmp_reg.command) {
result = tmp_reg.op_1 + tmp_reg.op_2;
wait(20, SC_NS); //time to do op
write_result(tmp_reg, result);
break;
case SUB:
result = tmp_reg.op_1 - tmp_reg.op_2;
wait(20, SC_NS); //time to do op
write_result(tmp_reg, result);
break;
case MULT:
result=tmp_reg.op_1*tmp_reg.op_2;
wait(40,SC_NS);
write_result(tmp_reg, result);
break;
case DIV:
result=tmp_reg.op_1/tmp_reg.op_2;
wait(40,SC_NS);
write_result(tmp_reg, result);
break;
default:
cout << endl << sc_time_stamp() << " "
<< name() << ": Received an illegal command, value = "
<<tmp_reg.command << endl << endl;
break;
}
}
}
//////////////////////////////////////////
void arith::return_proc() {
while (true){
// get a result and send it back
data_out->write(result_buffer.read());
}
}
////////////////////////////////////////////
void arith::write_result(cmd& tmp, sc_int<64>& result) {
tmp.op_1 = result.range(63,32); //upper 32 bits
tmp.op_2 = result.range(31,0);
// lower 32 bits
result_buffer.write(tmp);
// write into buffer
}