Thread: Shell command as a preprocessing token

OK, since nobody had any suggestion about making it work with tcsh, I am giving up on that. My new question is: How can I incorporate a (bash) shell command in a GNU Makefile?
Same as before, my program is this:

Code:

int main()
{
   printf("%s\n", GCCVERSION);
}

It is OK for me to do this:

Code:

bash-2.05$ gcc -DGCCVERSION="\"$(gcc --version |head -1)\"" testver.c
bash-2.05$ a.out
gcc (GCC) 3.4.4

But if I write a Makefile like this:

Code:

a.out: testver.c
        gcc -DGCCVERSION="\"$(gcc --version |head -1)\"" testver.c

It won't work:

Code:

bash-2.05$ make 
gcc -DGCCVERSION="\"\"" testver.c
bash-2.05$ a.out

What's wrong? Thank you.