I'm not a makefile expert, but this is at least a simple example of one:
Code:
INCL = header.h
SRC = file1.c file2.c file3.c
OBJ = $(SRC:.c=.o)
LIBS = -lcomctl32
EXE = a.exe
# compiler stuff
CC = gcc
CFLAGS = -O3
LDFLAGS = -o $(EXE) $(LIBS)
CFDEBUG = -g -DDEBUG $(LDFLAGS)
RM = rm -f
# create object files
%.o: %.c
$(CC) -c $(CFLAGS) $*.c -o $*.o
# linker objects
$(EXE): $(OBJ)
$(CC) $(OBJ) menu.o $(LDFLAGS) -mwindows
# object-dependent libraries
$(OBJ): $(INCL)
# make debug
debug:
$(CC) $(CFDEBUG) $(SRC)
# make clean
clean:
$(RM) $(OBJ) $(EXE)