mov eax,0x10 isn't, let's say,
mov al,0x10, because, in x86-64 mode, updating 32 bits aliases (E??) of 64 bits registers (R??) automatically zero the upper 32 bits (See Intel SDM or AMD development manuals). Other optimizations can occur if, for example, you use
push 0x10. In optimized code this instruction use an 8 bit immediate (and corresponding opcode). The same thing happens with conditional jumps (nasm tends to use an 8 bit RIP relative displacement).
Other interesing optimization happens when you code this "non existent" instruction:
Code:
mov eax,[5*eax]
movl (,%eax,5),%eax # Invalid on GAS!
This, in NASM, is translated to:
Code:
mov eax,[eax + 4*eax]
You can force NASM to
not optimize some of those instructions using
-O0 option at command line. See
nasm --help.
Why do you want to create bigger code if you can generate a smaller one?
Originally Posted by flp1969
