Thread: What is this macro style definition?

Hi guys,
I am looking an ADC driver and I found a definition that I do not understand how is expanded.

Code:

define NRF_SAADC_BASE              0x40007000UL

Code:

typedef struct {                                /*!< (@ 0x40007000) SAADC Structure                                            */
  __OM  uint32_t  TASKS_START;                  /*!< (@ 0x00000000) Starts the SAADC and prepares the result buffer
                                                                    in RAM                                                     */
  __OM  uint32_t  TASKS_SAMPLE;                 /*!< (@ 0x00000004) Takes one SAADC sample                                     */
  __OM  uint32_t  TASKS_STOP;                   /*!< (@ 0x00000008) Stops the SAADC and terminates all on-going conversions    */
  __OM  uint32_t  TASKS_CALIBRATEOFFSET;        /*!< (@ 0x0000000C) Starts offset auto-calibration                             */
  __IM  uint32_t  RESERVED[60];
  __IOM uint32_t  EVENTS_STARTED;               /*!< (@ 0x00000100) The SAADC has started                                      */
  __IOM uint32_t  EVENTS_END;                   /*!< (@ 0x00000104) The SAADC has filled up the result buffer                  */
} NRF_SAADC_Type;                               /*!< Size = 1592 (0x638)

This is the definition I do not understand. It is like creating a pointer NRF_SAADC to struct NRF_SAADC_Type and then initialize with NRF_SAADC_BASE? Could you re-write the following definition into a non-macro style function to understand how this expands?

Code:

#define NRF_SAADC                   ((NRF_SAADC_Type*)         NRF_SAADC_BASE)

Then he accesses the NRF_SAADC_Type struct to set a specific register like this:

Code:

NRF_SAADC->INTENSET = SAADC_INTENSET_END_Msk;

Thanks Nick

Struggling to understand why he is doing like that. Why is required this definition?

Code:

define NRF_SAADC_BASE              0x40007000UL

Why not implement like this?

Code:

NRF_SAADC_Type *NRF_SAADC

Originally Posted by Nikosant03

Struggling to understand why he is doing like that. Why is required this definition?

Code:

define NRF_SAADC_BASE              0x40007000UL

Why not implement like this?

Code:

NRF_SAADC_Type *NRF_SAADC

Doing it the way you suggest is probably the "right" way to do it, in terms of producing code that can be tested and debugged.

However, it might produce "worse" code in objective terms. Many small CPUs have a stark performance difference between "immediate" and "indirect" operations. Doing something like "load immediate from address" versus "load indirect" may cost more bytes of code, or cost more instruction cycles, or both. Especially when there is an extra offset involved (for any struct members not at offset 0).

Try writing a dummy function that does things both ways, and see what the generated assembly looks like. (But keep in mind there's a difference between local and global variables.)

Originally Posted by laserlight

"the author wanted the struct object to be located in that region of memory"

That makes sense!!
This is the base address of the ADC peripheral

Code:

define NRF_SAADC_BASE              0x40007000UL

So by locating the struct at the base address provides the offset address for all registers of the ADC peripheral. That's very clever and efficient!!
SAADC — Successive approximation analog-to-digital converter

This is the entire struct

Code:

typedef struct {                                /*!< (@ 0x40007000) SAADC Structure                                            */
  __OM  uint32_t  TASKS_START;                  /*!< (@ 0x00000000) Starts the SAADC and prepares the result buffer
                                                                    in RAM                                                     */
  __OM  uint32_t  TASKS_SAMPLE;                 /*!< (@ 0x00000004) Takes one SAADC sample                                     */
  __OM  uint32_t  TASKS_STOP;                   /*!< (@ 0x00000008) Stops the SAADC and terminates all on-going conversions    */
  __OM  uint32_t  TASKS_CALIBRATEOFFSET;        /*!< (@ 0x0000000C) Starts offset auto-calibration                             */
  __IM  uint32_t  RESERVED[60];
  __IOM uint32_t  EVENTS_STARTED;               /*!< (@ 0x00000100) The SAADC has started                                      */
  __IOM uint32_t  EVENTS_END;                   /*!< (@ 0x00000104) The SAADC has filled up the result buffer                  */
  __IOM uint32_t  EVENTS_DONE;                  /*!< (@ 0x00000108) A conversion task has been completed. Depending
                                                                    on the configuration, multiple conversions
                                                                    might be needed for a result to be transferred
                                                                    to RAM.                                                    */
  __IOM uint32_t  EVENTS_RESULTDONE;            /*!< (@ 0x0000010C) Result ready for transfer to RAM                           */
  __IOM uint32_t  EVENTS_CALIBRATEDONE;         /*!< (@ 0x00000110) Calibration is complete                                    */
  __IOM uint32_t  EVENTS_STOPPED;               /*!< (@ 0x00000114) The SAADC has stopped                                      */
  __IOM SAADC_EVENTS_CH_Type EVENTS_CH[8];      /*!< (@ 0x00000118) Peripheral events.                                         */
  __IM  uint32_t  RESERVED1[106];
  __IOM uint32_t  INTEN;                        /*!< (@ 0x00000300) Enable or disable interrupt                                */
  __IOM uint32_t  INTENSET;                     /*!< (@ 0x00000304) Enable interrupt                                           */
  __IOM uint32_t  INTENCLR;                     /*!< (@ 0x00000308) Disable interrupt                                          */
  __IM  uint32_t  RESERVED2[61];
  __IM  uint32_t  STATUS;                       /*!< (@ 0x00000400) Status                                                     */
  __IM  uint32_t  RESERVED3[63];
  __IOM uint32_t  ENABLE;                       /*!< (@ 0x00000500) Enable or disable SAADC                                    */
  __IM  uint32_t  RESERVED4[3];
  __IOM SAADC_CH_Type CH[8];                    /*!< (@ 0x00000510) Unspecified                                                */
  __IM  uint32_t  RESERVED5[24];
  __IOM uint32_t  RESOLUTION;                   /*!< (@ 0x000005F0) Resolution configuration                                   */
  __IOM uint32_t  OVERSAMPLE;                   /*!< (@ 0x000005F4) Oversampling configuration. The RESOLUTION is
                                                                    applied before averaging, thus for high
                                                                    OVERSAMPLE a higher RESOLUTION should be
                                                                    used.                                                      */
  __IOM uint32_t  SAMPLERATE;                   /*!< (@ 0x000005F8) Controls normal or continuous sample rate                  */
  __IM  uint32_t  RESERVED6[12];
  __IOM SAADC_RESULT_Type RESULT;               /*!< (@ 0x0000062C) RESULT EasyDMA channel                                     */
} NRF_SAADC_Type;                               /*!< Size = 1592 (0x638)                                                       */

So it can very easily modify a register

Code:

NRF_SAADC->INTENSET = SAADC_INTENSET_END_Msk;