Hello All,
I have had great luck in obtaining answers to my questions from this forum, so I though I might throw out this question, also.
Need to communicate with AD4000 using PIC32CM. AD has specific timing requirements. The SDI is sampled on the rising edge of the clock while SDO is sampled on the falling edge. SPI in general uses either rising or falling edge sampling.
Any thoughts, beside bitbanging, to achieve this task?
Thanks in advance.
--boomer
Without the actual interface between PIC and AD isn't possible to tell you anywhing. Show the circuit and your attempt with code...
Did you tried the CS-Mode?
Last edited by flp1969; 04-29-2021 at 09:01 AM.
Hi flp1969 - thanks for your reply.
1. The connection between the two components is straight forward. I have done this many times, so no issues there. Additionally, I am not concerned about the hardware failure at this point.
2. The software development will take place once this timing issue is resolved.
3. The jpg you posted is for ADC data reading timing diagram. Again this one is not of concern.
4. The screenshot of Figure 47 displaying the timing to configure the ADC register is of concern. It shows:
Clock cycle 1 shows that SDI is being sampled on rising edge of the clock.
While clock cycle 9 shows that SDO is being sampled on the falling edge of the clock.
This is the unusual behavior implementing the SPI protocol.
--boomer
Is there a logical reason you do not read the manual on how to configure an Serial Communication Module to do SPI?Flexible peripherals including four Serial Communication Modules (SERCOMs) that can be configured to act as an USART, UART, SPI, I2C, RS485 or LIN bus interface
Tim S.
"...a computer is a stupid machine with the ability to do incredibly smart things, while computer programmers are smart people with the ability to do incredibly stupid things. They are,in short, a perfect match.." Bill Bryson
"Is there a logical reason you do not read the manual on how to configure an Serial Communication Module to do SPI?"
Do you even understand the logic behind my question?
Nope, it isn't unusual. And I don't see the problem. The implementation is trivial:Originally Posted by boomeral
1- setup a 16 bit result to 0;
2- Set SDI to 1 and pulse the CNV signal (0 to 1 and back to 0, Tcnv ns [1->0 time]);
3- Set SDI to the upper bit of command and pulse SCLK signal (0 to 1 and back to 0, half Tsclk ns [1->0 time]);
4- Get SDO and wait half Tsclk
5- Shift the result 1 bit right and put the bit read in bit 0.
6- Shift the command 1 bit right while there is still bits in the command. If you already sent 6 bits, set SDI to 1 (once). Goto step 3 if didn't get 16 SCLK cycles already.
7- Wait TQuiet time.
8- Return the 16 bits resuilt.
Last edited by flp1969; 04-30-2021 at 11:22 AM.
Thanks, flp1969. I will be testing it in the coming weeks.
Share your code... I have no experience with PIC32, but already skim both datasheets. Glad to help if I can...
