Thread: Bug in the pciutils library?

*I just wrote a long post, hit Submit New Thread and my post somehow vanished (doesn't appear anywhere)*
Anyway, I was playing around with the pciutils library (see my previous thread here) and I think I found a bug.

Take a look at the following piece of code:

Code:

#include <stdio.h>
#include <pci.h>

int main(int argc, char* argv[]) {
    struct pci_access *pacc;
    struct pci_dev *dev;
    struct pci_cap *cap;

    pacc = pci_alloc();
    pci_init(pacc);
    pci_scan_bus(pacc);

    for (dev=pacc->devices; dev; dev=dev->next)    {
        if ((dev->bus != 2) || (dev->dev != 0) || (dev->func != 0)) continue;

        pci_fill_info(dev, PCI_FILL_EXT_CAPS);
        for (cap = dev->first_cap; cap; cap = cap->next) {
            printf("id = %x, type = %x, addr = %x\n", cap->id, cap->type, cap->addr);
        }
    }

    pci_cleanup(pacc);
    return 0;
}

This code supposed to populate the dev struct with the Extended PCI Capabilities supported by 02:00.0 and print them out.

Here are the capabilities supported by the 02:00.0 device:

Code:

$ sudo lspci -s 02:00.0 -v
02:00.0 Network controller: Qualcomm Atheros QCA9565 / AR9565 Wireless Network Adapter (rev 01)
    Subsystem: XAVi Technologies Corp. QCA9565 / AR9565 Wireless Network Adapter
    Flags: bus master, fast devsel, latency 0, IRQ 17
    Memory at d0700000 (64-bit, non-prefetchable) [size=512K]
    Expansion ROM at d0780000 [disabled] [size=64K]
    Capabilities: [40] Power Management version 2
    Capabilities: [50] MSI: Enable- Count=1/4 Maskable+ 64bit+
    Capabilities: [70] Express Endpoint, MSI 00
    Capabilities: [100] Advanced Error Reporting
    Capabilities: [140] Virtual Channel
    Capabilities: [160] Device Serial Number 00-00-00-00-00-00-00-00
    Kernel driver in use: ath9k

But when I run my code, this is the output:

Code:

$ sudo ./my_example
id = 3, type = 2, addr = 160
id = 2, type = 2, addr = 140
id = 1, type = 2, addr = 100
id = 10, type = 1, addr = 70
id = 5, type = 1, addr = 50
id = 1, type = 1, addr = 40
id = 10, type = 1, addr = 70
id = 5, type = 1, addr = 50
id = 1, type = 1, addr = 40

While the Extended PCI Capabilities are indeed there (highlighted in red), you can see that the Traditional PCI Capabilities list appear twice (highlighted in orange).
Now, I don't mind that invoking pci_fill_info() with PCI_FILL_EXT_CAPS will also populate the list with the Traditional Capabilities (it maybe unnecessary, though not wrong), but it shouldn't appear twice.
I think I zeroed in on the problem, who is responsible for this library and how can I contact them?

Thanks.