Thread: Trying to understand hazard pointer implementation

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  1. #11
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    Quote Originally Posted by Codeplug View Post
    >> ... but I think atomic ops bypass store buffers.
    Store buffers are just one of many techniques that cause visibility and reordering issues. Whatever the HW employs to cause things to appear non-sequential
    Yes. However, I think it all reduces down to something simple; whatever you store may never by other physical cores be seen at all, and if it is seen, it may be seen in any order. I have one unanswered question here though, which is to do with stores to the same location. I wonder if these can be sure to be seen in order of stores, or not.

    - the solution is memory barriers. Once you understand what the HW can do under the hood, you can forget about it - knowing that your membars will just "do the right thing".
    I may be wrong, but I think this is not so. Memory barriers do solve the ordering problem, but they do not solve the visibility problem; what you store *if it becomes visible* will become visible in the correct order (which is to say, order as constrained by store barriers) but there is no guarantee it *will become visible*. A forced write to memory (and only a force write to memory) guarantees that earlier stores will then be visible (as constrained by such store barriers issued up to that point).

    However, we are now repeating ourselves =-) I think you undestand what I mean, and I understand what you mean, so that's that :-)
    Last edited by Toby Douglass; 01-16-2017 at 08:58 AM.

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