I am working with a STM32f1 micro. In the standard peripheral libraries, I noticed they use some very organized methods of accessing the many registers and peripherals. I do not understand a small portion of this.This code is used to access registers for micro operational control. I could write "FLASH -> CR &= FLASH_CR_LATENCY_0;" to set or clear bits. I understand how pointers are generally used to access memory bits, but I do not understand how this typedef is put before the asterisk in the FLASH define. Can anyone explain whats going on clearly? If I am not mistaken, the typedef structure is simply a means of using the correct size pointer to point the specific memory address, and nothing more. I really could replace the FLASH_TypeDef * with __IO uint32*, correct? By the way __IO is macro for volatile. Thanks much!Code:typedef struct { __IO uint32_t ACR; __IO uint32_t KEYR; __IO uint32_t OPTKEYR; __IO uint32_t SR; __IO uint32_t CR; __IO uint32_t AR; __IO uint32_t RESERVED; __IO uint32_t OBR; __IO uint32_t WRPR; #ifdef STM32F10X_XL uint32_t RESERVED1[8]; __IO uint32_t KEYR2; uint32_t RESERVED2; __IO uint32_t SR2; __IO uint32_t CR2; __IO uint32_t AR2; #endif /* STM32F10X_XL */ } FLASH_TypeDef; #define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) /******************* Bit definition for FLASH_CR register ******************/ #define FLASH_ACR_LATENCY ((uint8_t)0x03) /*!< LATENCY[2:0] bits (Latency) */ #define FLASH_CR_LATENCY_0 ((uint8_t)0x00) /*!< Bit 0 */ #define FLASH_CR_LATENCY_1 ((uint8_t)0x01) /*!< Bit 0 */ #define FLASH_CR_LATENCY_2 ((uint8_t)0x02) /*!< Bit 1 */ #define FLASH_CR_HLFCYA ((uint8_t)0x08) /*!< Flash Half Cycle Access Enable */ #define FLASH_CR_PRFTBE ((uint8_t)0x10) /*!< Prefetch Buffer Enable */ #define FLASH_CR_PRFTBS ((uint8_t)0x20) /*!< Control Register Status */