Actually, make has some pretty fancy implicit rules, and will work just fine if you don't give it a compile command. I don't see anything immediately wrong with his makefile, though it's not a very pretty one.
@Adam Rinkleff:
Are you sure that is the only instance of "Invalid Command!" in your entire program, or that you changed the instance you think you changed? Try grep "Invalid Command" *.[ch], and make sure there's only one instance in there. Before you do a "make c", make sure that there are no .o files or executables in there that you can link with. Remove them by hand if you need to, and check by running "ls".
Here might be a better makefile. You might need to tweak this a bit, but it's a far cry better than what you have. I hope the explanations in the comments are clear enough.
Code:
CC = gcc
CFLAGS = -c -Wall # add any custom include paths, etc
LDFLAGS = #put in any custom library paths or required libs, etc here
INCS = $(wildcard *.h)
SRCS = $(wildcard *.c)
OBJS = $(patsubst %.c, %.o, $(SRCS))
EXE = chess
default: $(EXE) # this way, if you just type "make", it will make your chess executable
%.o : %.c $(INCS) # any file ending in .o requires it's corresponding .c file and everything in INCS
$(CC) $(CFLAGS) -o $@ $< # compile using CC, with CFLAGS flags, the output file is named $@, the target name (what matches %.o), and the input file is $< (the first prerequisite, what matches the %.c)
$(EXE) : $(OBJS) # the target 'chess' is dependent on all the object files
$(CC) $(LDFLAGS) -o $@ $^ # compile using CC, with LDFLAGS flags, the output file is named $@, the target name (chess), and the input file is $^, the entire list of prerequisites
clean:
rm -f $(OBJS) $(EXE) # remove all object files and the executable
clean_exe:
rm -f $(EXE) # remove the executable only
Note, there are better ways (i.e. dynamic) to determine what header files a .c file depends on, but for your smallish program, just making every .c rely on every .h should suffice, especially since it seems like there is only one .h file (header.h).
EDIT: Also note, make is very particular about white space. Make sure you use no indentation before the target : prereq lines, and a single tab before any commands. Leave a blank line between targets to be safe.