Is this processor 64-bit?

[ChadJohnson]

I ran FreshDiagnose on a computer, and I can't tell if it supports 64-bit instructions. It says the data bus width is 64-bit, but I'm not sure what that means. Here is the output.

Processor
This module contains information about your computer's central processor(s) and its capabilities.


                                          
Processor                                 
Model                                     Intel Pentium 4
Type                                      Primary Processor
Vendor                                    Intel Corporation
Family                                    Intel P4 Family
Hardcoded Name                            Intel(R) Xeon(TM) CPU 3.00GHz
Frequency                                 2992 MHz
Family/Model/Stepping                     15/4/3
Logical CPU Count                         2
Apic ID                                   6
CL Flush                                  8
                                          
Detailed Info                             
Address Bus Width                         36 Bit
Core Details                              126 µOPs, 48 Loads, 24 Stores In-Flight
Data Bus Width                            64 Bit
Execution Speed                           Up to 6 µOPs/Cycle
Execution Units                           Double-pumped ALU, FP Move/Store/FXCH, Double-pumped ALU,
                                          Slow ALU, FP Execute, Load, Store
Floating Point                            Integrated
Instruction Decoder                       1x IA-32/Cycle
Instruction Set                           IA-32
Multimedia                                MMX, SSE, SSE2
Multiprocessing                           SMP, using integrated local xAPICs
Physical Memory                           2^36 Bit (64 GB)
Pipeline Depth                            20 Stages
Power Management                          HLT, STPCLK, SMI/SMM, Sleep, Deep Sleep,
                                          Automatic Clock Throttling
Processor Core                            RISC, Out-of-order and Speculative Execution
Processor Modes                           Real, Protected, Virtual, Paging, SMM, Probe Mode
Registers                                 32 Bit Integer, 80 Bit FP, 64 Bit MM, 128 Bit SSE and SSE2
Split Voltage                             Yes (Automatically determined via VID Pins)
Supported External Bus Speed              100, 133 MHz Quad-Pumped, AGTL+
Supported Multiplier                      13.0x, 14.0x, ..., 24.0x
Virtual Memory                            65,528 GB (~64 TB)
                                          
Cache Configuration                       
L1 Code TLB                               4 KB pages, 4-way set associative, 32 entries
                                          4 KB/4 MB/2 MB pages, fully associative, 64 entries
L1 Data TLB                               4 KB/4 MB pages, fully associative, 64 entries
L2 Cache                                  None
Trace L1 Cache                            12 KµOPs, 8-way set associative
                                          
Processor Features                        
Floating-point Unit on chip (FPU)         Yes
MMX Instructions (MMX)                    Yes
MMX Instruction Extensions (MMX+)         No
3DNow! Instructions                       No
3DNow! Instruction Extensions (3DNow!+)   No
Streaming SIMD Extensions (SSE)           Yes
Streaming SIMD Extensions 2 (SSE2)        Yes
Multiprocessor Capable                    No
x86-64 Long Mode (LM)                     Yes
Virtual Mode Extension (VME)              Yes
Debugging Extension (DE)                  Yes
Page Size Extension (PSE)                 Yes
Time Stamp Counter (TSC)                  Yes
Model Specific Registers (MSR)            Yes
Physical Address Extension (PAE)          Yes
Machine Check Exception (MCE)             Yes
CMPXCHG8 Instruction (CX8)                Yes
On-chip APIC Hardware (APIC)              Yes
Fast System Call (SEP)                    Yes
Memory Type Range Registers (MTRR)        Yes
Page Global Enable (PGE)                  Yes
Machine Check Architecture (MCA)          Yes
Conditional Move Instruction (CMOV)       Yes
Page Attribute Table (PAT)                Yes
36-bit Page Size Extension (PSE36)        Yes
96-bit Processor Number (PSN)             No
CLFLUSH Instruction (CLFSH)               Yes
Debug Trace Store (DTS)                   Yes
ACPI Supported (ACPI)                     Yes
Fast Save and Restore (FXSR)              Yes
Self Snoop (SS)                           Yes
Thermal Monitor Supported (TM)            Yes
IA-64 Processor Capable (IA-64)           No

[ChadJohnson]

Sorry, didn't mean to post twice.

[IfYouSaySo]

This tells me it's 32-bit:

Instruction Set IA-32
IA-64 Processor Capable (IA-64) No

But usually what I do, is write a c program like this, if ptr size is 8, then you have 64-bit processor:

int main()
{
    printf("Ptr size: %d\n", sizeof(void*));
    return 0;
}

[CornedBee]

Address Bus Width 36 Bit

This is indicative of it being a 32-bit CPU. (32-bit direct addressing, 4-bit segment addressing)

IA-64 Processor Capable (IA-64) No

This merely means it's not an IA-64 CPU - but it could be an EM-64T CPU.

x86-64 Long Mode (LM) Yes

This is what confuses me. I'm not sure what Long Mode is, but x86-64 is the AMD 64-bit system, EM-64T for Intels.

Registers 32 Bit Integer

Another clue to it being 32-bit.

Instruction Decoder 1x IA-32/Cycle
Instruction Set IA-32

No mention of EM-64T.

In conclusion: it's definitely not an Itanium (IA-64), but you knew that: it's a Xeon, after all.
To the best of my knowledge, there aren't any 64-bit Xeons clocked at 3.0 GHz - I believe they start at about 3.5 GHz.
I'm pretty sure it's a normal 32-bit CPU.

[GanglyLamb]

Like cornedBee said, if it has an adress bus of 32-bits wide , then it's a 32 bit cpu, if it has 64 bit adress bus then its a 64 bit cpu.

Only big/important differences from what I've learned/remembered from my pc architecture course is that a 64 bit and 32 bit only differ in adress bus width ( thus being able to adres s much more memory ) and that a 64 bit cpu has more built in complex operations than a normal 32 bit cpu, thus being able to perform some complex operations faster since it wouldnt first have to break it down into a couple of basic operations and perform then one by one each cycle. ( was something about risc and cisc architectures ...it's been a while since that course anyway ).

[CornedBee]

Like cornedBee said, if it has an adress bus of 32-bits wide , then it's a 32 bit cpu, if it has 64 bit adress bus then its a 64 bit cpu.

The 32-bit CPU has a 36-bit address bus. I believe the first Athlon64 line had a 48-bit address bus.

Only big/important differences from what I've learned/remembered from my pc architecture course is that a 64 bit and 32 bit only differ in adress bus width ( thus being able to adres s much more memory ) and that a 64 bit cpu has more built in complex operations than a normal 32 bit cpu, thus being able to perform some complex operations faster since it wouldnt first have to break it down into a couple of basic operations and perform then one by one each cycle. ( was something about risc and cisc architectures ...it's been a while since that course anyway ).

Apparently. 32-bit and 64-bit architectures differ ONLY in address width (not even the address bus width is dictated by the address width). A given architecture might also add other differences, but this has nothing to do with the bitness.
For example, IA-32, the 80386+ architecture, is a CISC instruction set, 32-bit address width, 36-bit address bus (4 bits segment descriptor), with 8 more or less general purpose registers.
However, Pentium and later CPUs were at their core RISC CPUs, with the CISC capabilities kind of patched on.
x86-64, the Athlon64 architecture, is a CISC instruction set, 64-bit address width (only 48 bits used by the Athlon64), with 16 general purpose registers. But all Athlon64 CPUs are really RISC CPUs too.
IA-64, the Itanium architecture, is a RISC instruction set, 64-bit address width, with several banks of 128 general purpose registers each.

All the above is without regards to floating point operations and multimedia extensions such as SSE.

[Dave_Sinkula]

Misc:
http://en.wikipedia.org/wiki/64-bit