hey guys for the semester project in my computer architecture and logic design course I have to design a processor. I've done quite a bit allready but am stuck at this part: designing a tate machine.
The requirements for the state machine are:
basically, am I supposed to have the next state equal to some binarry number. For example REG = 001, ALU = 010...and so on. Or am I totally off track.
Build a state machine that produces three signals REG, ALU, MEM corresponding to states within the state machine.
input: W and clk
output: REG, ALU, MEM signals
W next state
REG 1 REG
REG 0 ALU
ALU 1 ALU
ALU 0 MEM
MEM 1 MEM
MEM 0 REG
BTW: the register, alu, and memory are allready designed.