couple of questions concerning multi core cpu's

[Masterx]

hello all, i have some questions concerning multi core processors which i couldnt find the exact answer for them ,
i would appreciate it if any of you guys answer my questions or direct me to find my answers .
ok .
how is the architecture of a typical multi core cpu ? i mean suppose we have a quad core cpu,
does this cpu have 4 ALU ? 4 CU ? inside itself ?(do we have these stuff for each core? )
or no there is only one ALU and one CU for all of the cores ?
in multi core cpu's , are each core a complete standalone cpu or not? its just lets say a part of a typical cpu of some kind?

what about executing an instruction ?
how does it happen on a multi core cpu? i mean suppose we have a program, how does a cpu know which core should manipulate that program( or thread/ ) ? is it done by operation system or no there is sth in the multi core cpu's which actually do these stuff (when we have a program or bunch of programs which wants or want to execute ,that specific part actually direct them to use core x for example ?

suppose we have couple of programs which are to execute and awaits the cpu to be executed, are these applications going to be executed on one core ? or they are all eaqually disrebuted on all cores?
suppose we have 4 programs and we have a quad core cpu , what happens then in this scenario ? are they going to uttelize the whole 4 cores ? or no / ? they would just use two cores (by the help of using threads ) ? or on one core again by the help of (threading on that core)

i would be grateful if anyone answer any of my questions . or atleast direct me to a place which i can read and find out the information im seeking.
thankyou in advance

[rdrast]

Complicated. In most designs, each core is just that, a Separate, Duplicated processor core, all on the same piece of silicon. For most multi-core designs, there is a common, largish, L3 cache, and smaller L1 and/or L2 caches which are generally split into instruction and data cache's.

Intel's "Core 2 Duo-Quad" processors actually were not, they were (are) simply two separate Core 2 Duo processors mounted in a common carrier, with separate L3 caches.

Intel's I7 series now is a true quad core processor, all 4 built onto a single piece of silicone, and sharing the L3 Cache, though each processor core has its own local private cache. I7's are also hyperthreaded, which means each CPU can deal with two instruction streams. That makes the I7's look like 8-core processors.

In any event, it is entirely up the the operating system to schedule processes and threads to run on available cores. The CPU has no actual say in the matter. The Operating system has every right to put all running threads on a single core, and reserve the rest for itself, or ignore them, but that is not typically done!

Actual computational power is absolutely NOT 'Balanced' among available cores, unless perhaps you are actually running a parallel tasking OS, with parallel tasking programs, but that is not what you will generally find in 95% of desktop processor usage.

[bithub]

The cores will each have their own ALU. As far as I know, the only thing that the cores share is the L2 cache (they each have their own L1 cache). I don't know how universal this is; there may be some architectures that share L1 cache, or have independent L2 cache.

A single-threaded application will not be spread out over all the cores. It will run on one core. A multi-threaded application can use multiple cores during its execution. Which cores it uses is decided by the operating system's scheduler.

[Masterx]

thanks a billion guys , that helped alot .
by the way where exactly should i look after the multi core cpu design in Intel's site ? i mean i noticed that bunch of review and benchmariking websites present a internal scheme(or shape) of a quad core cpu (for example )
where do they get that kind of pictures ? or the info concerning those new architectures?

[abachler]

It really depends on the specific processor model. Basic Intel processors have 2 ALU's, a dedicated FPU for the NPX and 2 FP execution units for SSE per core. AMD I believe has 2 ALU's but only one FPU which is shared between both FPU and SSE instructions.

[Masterx]

thank you very much, i got what i wanted .
again thank you very much

[CornedBee]

but only one FPU which is shared between both FPU and SSE instructions.

I believe that newer models (K10) have two FPUs at full SSE width.