calling 32-bit printf from 64-bit binary?

[matsp]

the problem is more likely with your disassembler, since the binary for 32 bit instructions and 64 bit instructions are (mostly) identical. It just depends on what mode the processor is in when whether it executes a 32 bit or 64 bit version of the opcode.

No, the assembler output by the compiler is as above, and it is correct.

--
Mats

[cyberfish]

Thanks for the explanations. I think I get it now, with just one more question -

Since x86 is little-endian, doesn't edi represent the most significant dword of rdi? How does it work, then? I can understand if edi represent the least significant bits... Does printf do the shifting?

[matsp]

EDI represents the lower half of the 64-bit RDI register - the order those bytes are stored in memory is not important for the purpose of this discussion. When EDI is loaded with 32-bit value and the processor is in 64-bit mode [and that applies even when the current process is a 32-bit process in compatibility mode], the upper half of these registers are filled with bit 31 of the 32-bit value, so loading 0x00001234 into EDI will actually result in RDI containing 0000000000001234. Loading 0x80001234 will result in 0xFFFFFFFF80001234 - note that the behaviour of the upper bits in pure 32-bit mode is undefined, so when going to 64-bit mode, all registers need to be re-loaded to ensure that the upper 32 bits are set - this is usually not a problem tho', as most systems never switch back to 32-bit mode once 64-bit mode has been entered [because there are lots of other things that ALSO need to be changed when switching from one to the other mode].

It is a common misconception that registers somehow have an "endian" behaviour. The only time that "endian" is involved is when data is accessed as bytes in memory - once it is in a register, the bits go from right to left in the same order as you would do on paper [1].

[1] Of course, this is a logical left to right - there's nothing saying that the chip-layout people won't stack the bits in two rows, one with bits 0..15 going from left to right, the other with bits 31..16 from right to left - but that's not really what we care about - logically, the bits are number 0 at the rightmost and 31 or 63 at the left of the set.

--
Mats

[cyberfish]

Oh. I see what you mean now. I was under the misconception that registers have endian-ness, too (bytes in a register). Thanks for clearing it up.

And sorry for the late reply, for some reason the email notification thing, which I have been relying on, didn't work for this thread.