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to pick up on our discussion about bit placement and ports. I have learned that in the x86 machine the smallest bits associate with the smallest ports, so what we have is actually the opposite of...

How would those addresses work out then, would it work like so:

9800+0x00 to 9800+0x03

9800 - 31:24
9801 - 23:16
9802 - 15:8
9803 - 7:0

9800+0x04 to 9800+0x07

EDIT: I take back what I thought. I agree with you. I think that if I access it the way you suggested that would be right. Because I looked at device manager and saw the IO range for the bar I am r/w...

here is the data sheet: http://gkernel.sourceforge.net/specs/sii/3112A_SiI-DS-0095-B2.pdf.bz2

here is what I tried that returned what was written:



//let base = 9800
unsigned char i;...

I think it must be aligned to a 32 bit boundary because each new base address starts with 0x00 as an offset and this one has two 32 bit boundaries one at offset 0x00 and the other at 0x04, then like...

oh, your right, I am sure it must be aligned by doing ~3, just as I was doing with the pci config registers. I'll try though, brb.

EDIT:

I tried it and it returned the right value, but how...

to pick back up on our discussion about bitfields, suppose I have this dilema:

I must use outb and inb to read from an IO address at 0x9804, this address contains four 8bit registers totaling...

What does the following actually suggest:



What is the "processor address space" is that RAM? What does "relative to the base address" mean, is that Address+Offset?

See the Linux Reference says that I could access the device three ways:

01. Memory Locations
02. I/O Ports
03. Config Registers

I was trying the Config Registers method but I kept returning...

No, I mean the address of a space of memory belonging to a device on the PCI bus. From the PCI controller I was given the IO and Memory space addresses of a device I am coding for and I now need to...

So, I have the address of the memory address and I want to map it into my kernels memory space, so that I can access the memory for both reading and writing. I am not very good at doing this. I have...

I tried this:



unsigned char* pBar5;
unsigned int* pTFR0;

// Map the memory
pBar5 = (unsigned char*)mapReg(BAR5, BAR5Sze);

I am not able to test this now, but if I:



unsigned char* pBar5;
unsigned int* pTFR0;

pBar5 = (unsigned char*)mapreg(BAR5, BAR5Sze); //map bar5

pTFR0 = (unsigned...

still having trouble understanding this. I tried mapping the memory to a pointer, but I am sure I am using it wrong as it keeps causing a double-fault:



unsigned char* pBar5;
unsigned int*...

At any rate, I am still having issues, perhaps I am still doing it wrong:



#define secPerTrk 0x3F //= 63
#define maxHeadNm 0xFE //= 254
#define intATACmd 0x91 //= initialize ata command
...

Not sure what your background is, but if you have never written a device driver before I can tell you from first hand experience that you definitely could. Have you ever written drivers or kernels...

sorry, could you please look at my edits above and just check if I understood you correctly? Thanks in advance.

Sorry man, I wrote that function, here it is:



int pci_read_config_dword (pci_t *pci, unsigned reg,
unsigned long *val)
{
outl(PCI_CONFIG_ADDR, 0x80000000L |
((unsigned long)pci->bus...

I'm sorry, I'll just show you what I am after:

So its BAR5+0x90 to get to the stuff below:



I need to read and write bit field 23:16. Hope this helps clear it up.

No, I think you are right, can you show me an example?

I tried mapping the address to a pointer but gcc wouldn't allow me to use the bitwise shift operator on the pointer. I tried:



//vars
unsigned char* pBar5;
unsigned int* tfreg0;

//map it...

Hi. I am seriously confused as to how to access a memory address+offset and bit field. My attempt is below:



#define secPerTrk 0x3F //= 63
#define maxHeadNm 0xFE //= 254
#define intATACmd...