Multi-directory Makefile

I'm looking to make a makefile which compiles 1 program, with a header file in a different directory.

I've got:
WordCount.c
adt/Table.c
adt/Table.h

Does anyone know how to make this compile? The WordCount.c and the Table.h are linked.

use -include option for the command

Note sure which you are asking for. I think you are actually asking "How can I include a header file from a different directory than the current one?", in which case it's got very little to do with makefiles, and a lot to do with compiler flags:

Code:

---

${CC} -Isomedir ...

---

will tell the compiler to look for include files in "somedir".

You will most likely also want to compile and link with "adt/table.c" - which leads to my followup of the posted answer:
You CAN use "include" to include another makefile from another directory. This is good if you have a large makefile to produce the code in that directory. If you only have a few files to build in that other directory,, you can specify source files from another directory in one makefile:

Code:

---

somedir/blah.o: somedir/blah.c
...
or
blah.o: somedir/blah.c
...

---

Of course, it may be that neither of these answers actually answer your question, in which case you need to rephrase the question.

--
Mats

Quote:

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Originally Posted by reelbigtim

I'm looking to make a makefile which compiles 1 program, with a header file in a different directory.

I've got:
WordCount.c
adt/Table.c
adt/Table.h

Does anyone know how to make this compile? The WordCount.c and the Table.h are linked.

---

In this case, the adt/ directory is acting like a "library" which WordCount.c is using. I'd make a sub-makefile for the adt "library" and place it in the adt/ directory. It will produce libadt.a. Then, the makefile for WordCount will refer to libadt.a with an appropriate rule which goes into adt/ and runs a sub-make if necessary.

Code:

---

WordCount.o: WordCount.c adt/Table.h
    $(CC) $(CFLAGS) -Iadt -c WordCount.c

WordCount: WordCount.o adt/libadt.a
  $(CC) -o $@ WordCount.o -Ladt -ladt

adt/libadt.a:
    cd adt && $(MAKE) libadt.a

---

Where adt/ has its own makefile:

Code:

---

libadt.a: Table.o
    ar ruvs $@ $^

---

Of course, these are not complete makefiles, but should show you what I mean.