Regular expressions with a makefile
My project is built using a make file. I have been using make files for a while but have yet to get into the fun parts of a make file, such as regular expressions for all the files/objects. I apologize in advance for all the programmers that are grinding their teeth over my post. You see, I have used an IDE such as Eclipse to do all my compiling & linking for me most of the time, but this time I am using a makefile. I have found a way to automatically find the *.cpp files, but the part that really boggles me is the multifolder part. My project is based on folders within folders, all the way down. (not quite that extensive, but you get the point) I have folders that go down 3 levels.
My current make file configuration is:
Code:
CC = g++
CFLAGS = -Wall
PROG = game
COMPILE = $(CC) $(CFLAGS) -c
OBJFILES := $(patsubst %.cpp,%.o,$(wildcard *.cpp))
ifeq ($(shell uname),Darwin)
LIBS = -framework OpenGL -framework GLUT
else
LIBS = -lglut
endif
all: $(PROG)
$(PROG): $(OBJFILES)
$(CC) -o $(PROG) $(OBJFILES) $(LIBS)
%.o: %.cpp
$(COMPILE) -o $@ $<
clean:
rm -f $(PROG)
rm -f *.o
And while I am at it, I might as well ask this question: do I include the .hpp files in the make file. I'm not really sure what a hpp file is in the first place. It sounds to me like a contradiction of terms personally, but it is part of the "glm" library I will soon use.
As always, thank you for all your help.