Lol, in fact I was about to do so, as I was reading I was already planing out the rant :D
Originally Posted by brewbuck
When the 8088/8086 came out, Harvard was still a major contender in minicomputer markets. The 8088 supports a Harvard configuration directly by outputting on s3 and s4 (pins 37 and 38) the segment register used to generate the address. This can, in a Harvard configuration be used to extend the memory space to 4MB by addressing 4 separate memory banks. Typically in embedded designs I have built or worked on, CS will refer to the firmware, SS to fast RAM, DS to NVRAM, and ES is generally used for primitive memory mapped IO. This trick does not work with modern processors int eh 8088 family due to the way caches keep track of memory locations.
Because all registers are still only 16 bits in size. They didn't want to change the entire architecture from previous model chips. 16 bit adders, comparators, etc. The highest priority for newer generation chips was to be able to use more memory. The number of address lines were increased by 4 making a total of 20. This enabled a 16x increase in memory capacity.
Originally Posted by BEN10
Having 4 separate segment registers meant that areas of memory can be used for different things... One may be for 'stack', one for 'source', one for 'destination' of some data copying. One segment register was used to keep track of where the executable code is. But these uses are conceptual... The thing that made them worthwhile is that instructions implicitly accessed memory addresses calculated from the contents of certain segment registers depending on context. For example, a JMP instruction would reference the 'code' segment register. Whichever segment register was implied could be overridden with instruction prefixes if needed.