Code:
#include <stdio.h>
typedef unsigned char UInt8;
typedef unsigned short UInt16;
typedef unsigned long UInt32;
struct HwrM68328Type {
UInt8 scr; /* $000: System Control Register*/
UInt8 ___filler0[0x004-0x001];
/* The following ID stuff is not present on earlier chips (before ??)*/
UInt8 chipID; /* $004: Chip ID Register*/
UInt8 maskID; /* $005: Mask ID Register*/
UInt16 swID; /* $006: Software ID Register*/
UInt8 ___filler1[0x100-0x008];
UInt16 csAGroupBase; /* $100: Chip Select Group A Base Register*/
UInt16 csBGroupBase; /* $102: Chip Select Group B Base Register*/
UInt16 csCGroupBase; /* $104: Chip Select Group C Base Register*/
UInt16 csDGroupBase; /* $106: Chip Select Group D Base Register*/
UInt16 csAGroupMask; /* $108: Chip Select Group A Mask Register*/
UInt16 csBGroupMask; /* $10A: Chip Select Group B Mask Register*/
UInt16 csCGroupMask; /* $10C: Chip Select Group C Mask Register*/
UInt16 csDGroupMask; /* $10E: Chip Select Group D Mask Register*/
UInt32 csASelect0; /* $110: Group A Chip Select 0 Register*/
UInt32 csASelect1; /* $114: Group A Chip Select 1 Register*/
UInt32 csASelect2; /* $118: Group A Chip Select 2 Register*/
UInt32 csASelect3; /* $11C: Group A Chip Select 3 Register*/
UInt32 csBSelect0; /* $120: Group B Chip Select 0 Register*/
UInt32 csBSelect1; /* $124: Group B Chip Select 1 Register*/
UInt32 csBSelect2; /* $128: Group B Chip Select 2 Register*/
UInt32 csBSelect3; /* $12C: Group B Chip Select 3 Register*/
UInt32 csCSelect0; /* $130: Group C Chip Select 0 Register*/
UInt32 csCSelect1; /* $134: Group C Chip Select 1 Register*/
UInt32 csCSelect2; /* $138: Group C Chip Select 2 Register*/
UInt32 csCSelect3; /* $13C: Group C Chip Select 3 Register*/
UInt32 csDSelect0; /* $140: Group D Chip Select 0 Register*/
UInt32 csDSelect1; /* $144: Group D Chip Select 1 Register*/
UInt32 csDSelect2; /* $148: Group D Chip Select 2 Register*/
UInt32 csDSelect3; /* $14C: Group D Chip Select 3 Register*/
UInt16 csDebug; /* $150: Chip Select debug register*/
UInt8 ___filler2[0x200-0x152];
UInt16 pllControl; /* $200: PLL Control Register*/
UInt16 pllFreqSel; /* $202: PLL Frequency Select Register*/
UInt16 pllTest; /* $204: PLL Test Register*/
UInt8 __filler44;
UInt8 pwrControl; /* $207: Power Control Register*/
UInt8 ___filler3[0x300-0x208];
UInt8 intVector; /* $300: Interrupt Vector Register*/
UInt8 ___filler4;
UInt16 intControl; /* $302: Interrupt Control Register*/
UInt16 intMaskHi; /* $304: Interrupt Mask Register/HIGH word*/
UInt16 intMaskLo; /* $306: Interrupt Mask Register/LOW word*/
UInt16 intWakeupEnHi; /* $308: Interrupt Wakeup Enable Register*/
UInt16 intWakeupEnLo; /* $30A: Interrupt Wakeup Enable Register*/
UInt16 intStatusHi; /* $30C: Interrupt Status Register/HIGH word*/
UInt16 intStatusLo; /* $30E: Interrupt Status Register/LOW word*/
UInt16 intPendingHi; /* $310: Interrupt Pending Register*/
UInt16 intPendingLo; /* $312: Interrupt Pending Register*/
UInt8 ___filler4a[0x400-0x314];
UInt8 portADir; /* $400: Port A Direction Register*/
UInt8 portAData; /* $401: Port A Data Register*/
UInt8 ___filler5;
UInt8 portASelect; /* $403: Port A Select Register*/
UInt8 ___filler6[4];
UInt8 portBDir; /* $408: Port B Direction Register*/
UInt8 portBData; /* $409: Port B Data Register*/
UInt8 ___filler7;
UInt8 portBSelect; /* $40B: Port B Select Register */
UInt8 ___filler8[4];
UInt8 portCDir; /* $410: Port C Direction Register*/
UInt8 portCData; /* $411: Port C Data Register*/
UInt8 ___filler9;
UInt8 portCSelect; /* $413: Port C Select Register */
UInt8 ___filler10[4];
UInt8 portDDir; /* $418: Port D Direction Register*/
UInt8 portDData; /* $419: Port D Data Register*/
UInt8 portDPullupEn; /* $41A: Port D Pull-up Enable*/
UInt8 ___filler11;
UInt8 portDPolarity; /* $41C: Port D Polarity Register*/
UInt8 portDIntReqEn; /* $41D: Port D Interrupt Request Enable*/
UInt8 ___filler12;
UInt8 portDIntEdge; /* $41F: Port D IRQ Edge Register*/
UInt8 portEDir; /* $420: Port E Direction Register*/
UInt8 portEData; /* $421: Port E Data Register*/
UInt8 portEPullupEn; /* $422: Port E Pull-up Enable*/
UInt8 portESelect; /* $423: Port E Select Register*/
UInt8 ___filler14[4];
UInt8 portFDir; /* $428: Port F Direction Register*/
UInt8 portFData; /* $429: Port F Data Register*/
UInt8 portFPullupEn; /* $42A: Port F Pull-up Enable*/
UInt8 portFSelect; /* $42B: Port F Select Register*/
UInt8 ___filler16[4];
UInt8 portGDir; /* $430: Port G Direction Register*/
UInt8 portGData; /* $431: Port G Data Register*/
UInt8 portGPullupEn; /* $432: Port G Pull-up Enable*/
UInt8 portGSelect; /* $433: Port G Select Register*/
UInt8 ___filler18[4];
UInt8 portJDir; /* $438: Port J Direction Register*/
UInt8 portJData; /* $439: Port J Data Register*/
UInt8 ___filler19;
UInt8 portJSelect; /* $43B: Port J Select Register*/
UInt8 ___filler19a[4];
UInt8 portKDir; /* $440: Port K Direction Register*/
UInt8 portKData; /* $441: Port K Data Register*/
UInt8 portKPullupEn; /* $442: Port K Pull-up Enable*/
UInt8 portKSelect; /* $443: Port K Select Register*/
UInt8 ___filler21[4];
UInt8 portMDir; /* $448: Port M Direction Register*/
UInt8 portMData; /* $449: Port M Data Register*/
UInt8 portMPullupEn; /* $44A: Port M Pull-up Enable Register*/
UInt8 portMSelect; /* $44B: Port M Select Register*/
UInt8 ___filler22[4];
UInt8 ___filler23[0x500-0x450];
UInt16 pwmControl; /* $500: PWM Control Register*/
UInt16 pwmPeriod; /* $502: PWM Period Register*/
UInt16 pwmWidth; /* $504: PWM Width Register*/
UInt16 pwmCounter; /* $506: PWM Counter*/
UInt8 ___filler24[0x600-0x508];
UInt16 tmr1Control; /* $600: Timer 1 Control Register*/
UInt16 tmr1Prescaler; /* $602: Timer 1 Prescaler Register*/
UInt16 tmr1Compare; /* $604: Timer 1 Compare Register*/
UInt16 tmr1Capture; /* $606: Timer 1 Capture Register*/
UInt16 tmr1Counter; /* $608: Timer 1 Counter Register*/
UInt16 tmr1Status; /* $60A: Timer 1 Status Register*/
UInt16 tmr2Control; /* $60C: Timer 2 Control Register*/
UInt16 tmr2Prescaler; /* $60E: Timer 2 Prescaler Register*/
UInt16 tmr2Compare; /* $610: Timer 2 Compare Register*/
UInt16 tmr2Capture; /* $612: Timer 2 Capture Register*/
UInt16 tmr2Counter; /* $614: Timer 2 Counter Register*/
UInt16 tmr2Status; /* $616: Timer 2 Status Register*/
UInt16 wdControl; /* $618: Watchdog Control Register*/
UInt16 wdReference; /* $61A: Watchdog Reference Register*/
UInt16 wdCounter; /* $61C: Watchdog Counter*/
UInt8 ___filler25[0x700-0x61E];
UInt16 spiSlave; /* $700: SPI Slave Register*/
UInt8 ___filler26[0x800-0x702];
UInt16 spiMasterData; /* $800: SPI Master Data Register*/
UInt16 spiMasterControl; /* $802: SPI Master Control Register*/
UInt8 ___filler27[0x900-0x804];
UInt16 uControl; /* $900: Uart Control Register*/
UInt16 uBaud; /* $902: Uart Baud Control Register*/
UInt16 uReceive; /* $904: Uart Receive Register*/
UInt16 uTransmit; /* $906: Uart Transmit Register*/
UInt16 uMisc; /* $908: Uart Miscellaneous Register*/
UInt8 ___filler28[0xA00-0x90A];
UInt32 lcdStartAddr; /* $A00: Screen Starting Address Register*/
UInt8 ___filler29;
UInt8 lcdPageWidth; /* $A05: Virtual Page Width Register*/
UInt8 ___filler30[2];
UInt16 lcdScreenWidth; /* $A08: Screen Width Register*/
UInt16 lcdScreenHeight; /* $A0A: Screen Height Register*/
UInt8 ___filler31[0xA18-0xA0C];
UInt16 lcdCursorXPos; /* $A18: Cursor X Position*/
UInt16 lcdCursorYPos; /* $A1A: Cursor Y Position*/
UInt16 lcdCursorWidthHeight; /* $A1C: Cursor Width and Height*/
UInt8 ___filler32;
UInt8 lcdBlinkControl; /* $A1F: Blink Control Register*/
UInt8 lcdPanelControl; /* $A20: Panel Interface Control Register*/
UInt8 lcdPolarity; /* $A21: Polarity Config Register*/
UInt8 ___filler33;
UInt8 lcdACDRate; /* $A23: ACD (M) Rate Control Register*/
UInt8 ___filler34;
UInt8 lcdPixelClock; /* $A25: Pixel Clock Divider Register*/
UInt8 ___filler35;
UInt8 lcdClockControl; /* $A27: Clocking Control Register*/
UInt8 ___filler36;
UInt8 lcdLastBufferAddr; /* $A29: Last Buffer Address Register*/
UInt8 ___filler37;
UInt8 lcdOctetTermCount; /* $A2B: Octet Terminal Count Register*/
UInt8 ___filler38;
UInt8 lcdPanningOffset; /* $A2D: Panning Offset Register*/
UInt8 ___filler39[3];
UInt8 lcdFrameRate; /* $A31: Frame Rate Control Modulation Register*/
UInt16 lcdGrayPalette; /* $A32: Gray Palette Mapping Register*/
UInt8 lcdReserved; /* $A34: Reserved*/
UInt8 ___filler40[0xB00-0xA35];
UInt32 rtcHourMinSec; /* $B00: RTC Hours, Minutes, Seconds Register*/
UInt32 rtcAlarm; /* $B04: RTC Alarm Register*/
UInt32 rtcReserved; /* $B08: RTC Reserved*/
UInt16 rtcControl; /* $B0C: RTC Control Register*/
UInt16 rtcIntStatus; /* $B0E: RTC Interrupt Status Register*/
UInt16 rtcIntEnable; /* $B10: RTC Interrupt Enable Register*/
UInt16 stopWatch; /* $B12: Stopwatch Minutes*/
};
const struct HwrM68328Type kInitial68328RegisterValues =
{
0x0C, /* Byte scr; // $000: System Control Register*/
{ 0 }, /* Byte ___filler0[0x004-0x001];*/
/* The following ID stuff is not present on earlier chips (before ??)*/
0,/*hwr328chipID328, /* Byte chipID; // $004: Chip ID
Register*/
0,/*hwr328maskID1H58B, /* Byte maskID; // $005: Mask ID
Register*/
0x00, /* Word swID; // $006: Software ID Register*/
{ 0 }, /* Byte ___filler1[0x100-0x008]; */
0x0000, /* Word csAGroupBase; // $100: Chip Select Group A Base Register*/
0x0000, /* Word csBGroupBase; // $102: Chip Select Group B Base Register*/
0x0000, /* Word csCGroupBase; // $104: Chip Select Group C Base Register*/
0x0000, /* Word csDGroupBase; // $106: Chip Select Group D Base Register*/
0x0000, /* Word csAGroupMask; // $108: Chip Select Group A Mask Register*/
0x0000, /* Word csBGroupMask; // $10A: Chip Select Group B Mask Register*/
0x0000, /* Word csCGroupMask; // $10C: Chip Select Group C Mask Register*/
0x0000, /* Word csDGroupMask; // $10E: Chip Select Group D Mask Register*/
0x00010006, /* DWord csASelect0; // $110: Group A Chip Select 0 Register*/
0x00010006, /* DWord csASelect1; // $114: Group A Chip Select 1 Register*/
0x00010006, /* DWord csASelect2; // $118: Group A Chip Select 2 Register*/
0x00010006, /* DWord csASelect3; // $11C: Group A Chip Select 3 Register*/
0x00000000, /* DWord csBSelect0; // $120: Group B Chip Select 0 Register*/
0x00000000, /* DWord csBSelect1; // $124: Group B Chip Select 1 Register*/
0x00000000, /* DWord csBSelect2; // $128: Group B Chip Select 2 Register*/
0x00000000, /* DWord csBSelect3; // $12C: Group B Chip Select 3 Register*/
0x00010006, /* DWord csCSelect0; // $130: Group C Chip Select 0 Register*/
0x00010006, /* DWord csCSelect1; // $134: Group C Chip Select 1 Register*/
0x00010006, /* DWord csCSelect2; // $138: Group C Chip Select 2 Register*/
0x00010006, /* DWord csCSelect3; // $13C: Group C Chip Select 3 Register*/
0x00000000, /* DWord csDSelect0; // $140: Group D Chip Select 0 Register*/
0x00000000, /* DWord csDSelect1; // $144: Group D Chip Select 1 Register*/
0x00000000, /* DWord csDSelect2; // $148: Group D Chip Select 2 Register*/
0x00000000, /* DWord csDSelect3; // $14C: Group D Chip Select 3 Register*/
0x0000, /* Word csDebug; // $150: Chip Select debug register*/
{ 0 }, /* Byte ___filler2[0x200-0x152];*/
0x2400, /* Word pllControl; // $200: PLL Control Register*/
0x0123, /* Word pllFreqSel; // $202: PLL Frequency Select Register*/
0x0000, /* Word pllTest; // $204: PLL Test Register*/
{ 0 }, /* Byte __filler44;*/
0x1F, /* Byte pwrControl; // $207: Power Control Register*/
{ 0 }, /* Byte ___filler3[0x300-0x208];*/
0x00, /* Byte intVector; // $300: Interrupt Vector Register*/
{ 0 }, /* Byte ___filler4;*/
0x0000, /* Word intControl; // $302: Interrupt Control Register*/
0x00FF, /* Word intMaskHi; // $304: Interrupt Mask Register/HIGH word*/
0xFFFF, /* Word intMaskLo; // $306: Interrupt Mask Register/LOW word*/
0x00FF, /* Word intWakeupEnHi; // $308: Interrupt Wakeup Enable Register*/
0xFFFF, /* Word intWakeupEnLo; // $30A: Interrupt Wakeup Enable Register*/
0x0000, /* Word intStatusHi; // $30C: Interrupt Status Register/HIGH word*/
0x0000, /* Word intStatusLo; // $30E: Interrupt Status Register/LOW word*/
0x0000, /* Word intPendingHi; // $310: Interrupt Pending Register*/
0x0000, /* Word intPendingLo; // $312: Interrupt Pending Register*/
{ 0 }, /* Byte ___filler4a[0x400-0x314];*/
0x00, /* Byte portADir; // $400: Port A Direction Register*/
0x00, /* Byte portAData; // $401: Port A Data Register*/
{ 0 }, /* Byte ___filler5;*/
0x00, /* Byte portASelect; // $403: Port A Select Register*/
{ 0 }, /* Byte ___filler6[4];*/
0x00, /* Byte portBDir; // $408: Port B Direction Register*/
0x00, /* Byte portBData; // $409: Port B Data Register*/
{ 0 }, /* Byte ___filler7;*/
0x00, /* Byte portBSelect; // $40B: Port B Select Register*/
{ 0 }, /* Byte ___filler8[4];*/
0x00, /* Byte portCDir; // $410: Port C Direction Register*/
0x00, /* Byte portCData; // $411: Port C Data Register*/
{ 0 }, /* Byte ___filler9;*/
0x00, /* Byte portCSelect; // $413: Port C Select Register*/
{ 0 }, /* Byte ___filler10[4];*/
0x00, /* Byte portDDir; // $418: Port D Direction Register*/
0x00, /* Byte portDData; // $419: Port D Data Register*/
0xFF, /* Byte portDPullupEn; // $41A: Port D Pull-up Enable*/
{ 0 }, /* Byte ___filler11;*/
0x00, /* Byte portDPolarity; // $41C: Port D Polarity Register*/
0x00, /* Byte portDIntReqEn; // $41D: Port D Interrupt Request Enable*/
{ 0 }, /* Byte ___filler12;*/
0x00, /* Byte portDIntEdge; // $41F: Port D IRQ Edge Register*/
0x00, /* Byte portEDir; // $420: Port E Direction Register*/
0x00, /* Byte portEData; // $421: Port E Data Register*/
0x80, /* Byte portEPullupEn; // $422: Port E Pull-up Enable*/
0x80, /* Byte portESelect; // $423: Port E Select Register*/
{ 0 }, /* Byte ___filler14[4];*/
0x00, /* Byte portFDir; // $428: Port F Direction Register*/
0x00, /* Byte portFData; // $429: Port F Data Register*/
0xFF, /* Byte portFPullupEn; // $42A: Port F Pull-up Enable*/
0xFF, /* Byte portFSelect; // $42B: Port F Select Register*/
{ 0 }, /* Byte ___filler16[4];*/
0x00, /* Byte portGDir; // $430: Port G Direction Register*/
0x00, /* Byte portGData; // $431: Port G Data Register*/
0xFF, /* Byte portGPullupEn; // $432: Port G Pull-up Enable*/
0xFF, /* Byte portGSelect; // $433: Port G Select Register*/
{ 0 }, /* Byte ___filler18[4];*/
0x00, /* Byte portJDir; // $438: Port J Direction Register*/
0x00, /* Byte portJData; // $439: Port J Data Register*/
{ 0 }, /* Byte ___filler19;*/
0x00, /* Byte portJSelect; // $43B: Port J Select Register*/
{ 0 }, /* Byte ___filler19a[4];*/
0x00, /* Byte portKDir; // $440: Port K Direction Register*/
0x00, /* Byte portKData; // $441: Port K Data Register*/
0x3F, /* Byte portKPullupEn; // $442: Port K Pull-up Enable*/
0x3F, /* Byte portKSelect; // $443: Port K Select Register*/
{ 0 }, /* Byte ___filler21[4];*/
0x00, /* Byte portMDir; // $448: Port M Direction Register*/
0x00, /* Byte portMData; // $449: Port M Data Register*/
0xFF, /* Byte portMPullupEn; // $44A: Port M Pull-up Enable Register*/
0x02, /* Byte portMSelect; // $44B: Port M Select Register*/
{ 0 }, /* Byte ___filler22[4];*/
{ 0 }, /* Byte ___filler23[0x500-0x450];*/
0x0000, /* Word pwmControl; // $500: PWM Control Register*/
0x0000, /* Word pwmPeriod; // $502: PWM Period Register*/
0x0000, /* Word pwmWidth; // $504: PWM Width Register*/
0x0000, /* Word pwmCounter; // $506: PWM Counter*/
{ 0 }, /* Byte ___filler24[0x600-0x508];*/
0x0000, /* Word tmr1Control; // $600: Timer 1 Control Register*/
0x0000, /* Word tmr1Prescaler; // $602: Timer 1 Prescaler Register*/
0xFFFF, /* Word tmr1Compare; // $604: Timer 1 Compare Register*/
0x0000, /* Word tmr1Capture; // $606: Timer 1 Capture Register*/
0x0000, /* Word tmr1Counter; // $608: Timer 1 Counter Register*/
0x0000, /* Word tmr1Status; // $60A: Timer 1 Status Register*/
0x0000, /* Word tmr2Control; // $60C: Timer 2 Control Register*/
0x0000, /* Word tmr2Prescaler; // $60E: Timer 2 Prescaler Register*/
0xFFFF, /* Word tmr2Compare; // $610: Timer 2 Compare Register*/
0x0000, /* Word tmr2Capture; // $612: Timer 2 Capture Register*/
0x0000, /* Word tmr2Counter; // $614: Timer 2 Counter Register*/
0x0000, /* Word tmr2Status; // $616: Timer 2 Status Register*/
0x0000, /* Word wdControl; // $618: Watchdog Control Register*/
0x0000, /* Word wdReference; // $61A: Watchdog Reference Register*/
0x0000, /* Word wdCounter; // $61C: Watchdog Counter*/
{ 0 }, /* Byte ___filler25[0x700-0x61E];*/
0x0000, /* Word spiSlave; // $700: SPI Slave Register*/
{ 0 }, /* Byte ___filler26[0x800-0x702];*/
0x0000, /* Word spiMasterData; // $800: SPI Master Data Register*/
0x0000, /* Word spiMasterControl; // $802: SPI Master Control Register*/
{ 0 }, /* Byte ___filler27[0x900-0x804];*/
0x0000, /* Word uControl; // $900: Uart Control Register*/
0x003F, /* Word uBaud; // $902: Uart Baud Control Register*/
0x0000, /* Word uReceive; // $904: Uart Receive Register*/
0x0000, /* Word uTransmit; // $906: Uart Transmit Register*/
0x0000, /* Word uMisc; // $908: Uart Miscellaneous Register*/
{ 0 }, /* Byte ___filler28[0xA00-0x90A];*/
0x00000000, /* DWord lcdStartAddr; // $A00: Screen Starting Address Register*/
{ 0 }, /* Byte ___filler29;*/
0xFF, /* Byte lcdPageWidth; // $A05: Virtual Page Width Register*/
{ 0 }, /* Byte ___filler30[2];*/
0x03FF, /* Word lcdScreenWidth; // $A08: Screen Width Register*/
0x01FF, /* Word lcdScreenHeight; // $A0A: Screen Height Register*/
{ 0 }, /* Byte ___filler31[0xA18-0xA0C];*/
0x0000, /* Word lcdCursorXPos; // $A18: Cursor X Position*/
0x0000, /* Word lcdCursorYPos; // $A1A: Cursor Y Position*/
0x0101, /* Word lcdCursorWidthHeight; // $A1C: Cursor Width and Height*/
{ 0 }, /* Byte ___filler32;*/
0x7F, /* Byte lcdBlinkControl; // $A1F: Blink Control Register*/
0x00, /* Byte lcdPanelControl; // $A20: Panel Interface Control Register*/
0x00, /* Byte lcdPolarity; // $A21: Polarity Config Register*/
0x00, /* Byte ___filler33;*/
0x00, /* Byte lcdACDRate; // $A23: ACD (M) Rate Control Register*/
0x00, /* Byte ___filler34;*/
0x00, /* Byte lcdPixelClock; // $A25: Pixel Clock Divider Register*/
0x00, /* Byte ___filler35;*/
0x40, /* Byte lcdClockControl; // $A27: Clocking Control Register*/
0x00, /* Byte ___filler36;*/
0x3E, /* Byte lcdLastBufferAddr; // $A29: Last Buffer Address Register*/
0x00, /* Byte ___filler37;*/
0x3F, /* Byte lcdOctetTermCount; // $A2B: Octet Terminal Count Register*/
0x00, /* Byte ___filler38;*/
0x00, /* Byte lcdPanningOffset; // $A2D: Panning Offset Register*/
{ 0 }, /* Byte ___filler39[3];*/
0xB9, /* Byte lcdFrameRate; // $A31: Frame Rate Control Modulation Register*/
0x1073, /* Word lcdGrayPalette; // $A32: Gray Palette Mapping Register*/
0x00, /* Byte lcdReserved; // $A34: Reserved*/
{ 0 }, /* Byte ___filler40[0xB00-0xA35];*/
0x00000000, /* DWord rtcHourMinSec; // $B00: RTC Hours, Minutes, Seconds Register*/
0x00000000, /* DWord rtcAlarm; // $B04: RTC Alarm Register*/
0x00000000, /* DWord rtcReserved; // $B08: RTC Reserved*/
0x0000, /* Word rtcControl; // $B0C: RTC Control Register*/
0x0000, /* Word rtcIntStatus; // $B0E: RTC Interrupt Status Register*/
0x0000, /* Word rtcIntEnable; // $B10: RTC Interrupt Enable Register*/
0x0000 /* Word stopWatch; // $B12: Stopwatch Minutes*/
}; /*line 321*/
int main(void)
{
puts("hello world");
return 0;
}
Not so in C++.