makefiles - debug & release?

I almost thought I had it solved, but I can't quite get it to do exactly what I want.

I'm trying to write a makefile that will create either debug or release files depending on what I specify. What I'd like to be able to run is:

Code:

---

make debug all
make release static
make debug shared
...

---

I thought I found the solution by doing: ifeq "$@" "debug" ..., but I think when it gets to the next parameter ("all" for example), whatever variables I set in the first stage with "debug" are lost.

Is there a way to do this?
I want to do exactly the same thing in both debug & release, except in debug I want to add a few things to the end of my CFLAGS, HEADERS & OBJS variables.

The common way to do this is to use a "command line override", e.g.

Code:

---

make DEBUG=y all

---

In your makefile, you do some if-statement to say

Code:

---

CFLAGS = <your common settings>
if ${DEBUG}=y 
  CFLAGS += -g
else
  CLFAGS += -O2
endif

---

I you may want to check the exact syntax of if-statements in your makefile, but I'm sure the principle is clear.

--
Mats

Thanks, I could try that.

One thing I also tried is setting environment variables:

Code:

---

debug:
        set CFLAGS_ENV = -g -DDEBUG
        set HEADERS_ENV = $(SRC)/debug.h
        set OBJS_ENV = debug.o
        export CFLAGS_ENV ; export HEADERS_ENV ; export OBJS_ENV

---

But when I add them to the make variables they're blank.

When you do: make first second third
Do first, second & third each get called in their own shell or is the whole make in one shell?

I'm pretty sure that each compile is run as a separate process, and it wouldn't surprise me if there is a separate shell for each.

Why do you want environment variables, rather than "make" variables?

--
Mats

Yes, each command has its own shell. You could get around that by doing something like this:

Code:

---

debug:
        set CFLAGS_ENV = -g -DDEBUG ; \
        set HEADERS_ENV = $(SRC)/debug.h ; \
        set OBJS_ENV = debug.o ; \
        export CFLAGS_ENV ; export HEADERS_ENV ; export OBJS_ENV

---

But as matsp said, you'd be better off using internal make variables.

Quote:

---

Originally Posted by matsp

Why do you want environment variables, rather than "make" variables?Mats

---

That's the first thing I tried, but the variables disappear once make moves from 'debug' to 'all'.

I came up with a partial solution though. I created a Make.sh script

Code:

---

#!/bin/sh

for arg in $*
do
  if [ "$arg" = "debug" ]; then
    DEBUG_FLAG=1
    export DEBUG_FLAG
  fi
  let "n+=1"
done

make $*

---

Then I just add this to my makefile:

Code:

---

ifdef DEBUG_FLAG
  CFLAGS_DBG=-O0 -g -DDEBUG
  HEADERS_DBG=$(SRC)/debug.h
  OBJS_DBG=debug.o
else
  CFLAGS_DBG=-O3
  HEADERS_DBG=
  OBJS_DBG=
endif

---

The only way to do things that I can think of at the moment is to have debug and release create a file, say variables, which is then included in your main Makefile.

Code:

---

.PHONY: debug release all

variables:
        touch variables

debug:
        echo CFLAGS = -g >> variables

release:
        echo CFLAGS = -O2 >> variables

include variables

all:
        -echo gcc $(CFLAGS)

---

Something like that. The advantage of this is that you can go

Code:

---

make debug

---

and then every "make all" after that will use debug mode.