Make files

[sara.stanley]

Hi,

I am trying to build a make file then when we type make it cleans up all the object files and the .exe file and compile everytime even though I didnot modify anything. But mine doesnot work.

.
PHONY :clean

 CC = gcc
test: test.o
	gcc test.o -o test
	
test.o:test.c
	gcc -c test.c 

	clean:
	rm test.exe test.o

[Cactus_Hugger]

1.) Make sure there is no whitespace before CC = gcc and clean:.
2.) I think it's .PHONY : clean

Also, you'll need to type make clean (or make -f makefile_name clean if your makefile isn't named "Makefile") Note that makefile clean will only clean, not compile... usually you do:

$ make clean
$ make

If you're wanting to clean every time, perhaps a short script? Otherwise, I wouldn't know how, or why, since cleaning all the dependants each time sort of defeats the purpose of a makefile... it becomes a mindless batch file.

Here's my hopefully correct version:

CC = gcc

.PHONY : clean all
all : test

test: test.o
	gcc test.o -o test
	
test.o: test.c
	gcc -c test.c 

clean:
	rm test.exe test.o

[dwks]

There's a default rule that compiles .c files into .o files, so you don't need this:

test.o: test.c
	gcc -c test.c