Thread: Help with makefile.

Hello everybody!

I need help with makefiles. I read almost every guide I found ( I liked very much the GNU Make documentation ) but I need some hints by an experienced programmer.

Can I write a makefile such that I can use a command line like these examples:

Code:

make platform1 debug
make platform2 release
make debug platform3 serialNum

and so on: I would like to be able to specify different options on the command line instead #defining them in my main.h definitions file. Is this possible with make? Or should I do this in another way?

I tried two days, but I can't reach this result. Also I find much behaviors which are not descripted in docs ( some vars loose their value from a 'goal' to another, for example ).

I'm using Cygwin to run GCC.

Thank you very much for your help.

Yes, you can do this.

Code:

platform1_debug: gcc -platform1 -debug file.c

If that's your makefile, you can invoke that particular option like so:
$> make platform1_debug

You can make as many as those as you like.

That's how make install works. There's just a portion of the makefile that beings install:

Thank you Josh, but it's the way I did as last chance: I created a goal for each possible combination.

From the answers, I must imagine that there's no simple way to do what I was looking to do with make, using with "flags" on the command line in such a way to avoid the writing of all the n! combinations of the n parameters...

I was trying something as this:

Code:

param1: FLAGS += -DFLAG1
param1: MAKECMDGOALS := $(MAKECMDGOALS: param1 = )
param1: .scanCommands
param1: .done

param2: FLAGS += -DFLAG2
param1: MAKECMDGOALS := $(MAKECMDGOALS: param2 = )
param2: .scanCommands
param2: .done

....

.scanCommands: 
ifneq (,$(findstring param1,$(MAKECMDGOALS)))
.scanCommands: FLAGS += -DFLAG1
.scanCommands: MAKECMDGOALS := $(MAKECMDGOALS: param1 = )
endif

ifneq (,$(findstring param2,$(MAKECMDGOALS)))
.scanCommands: FLAGS += -DFLAG2
.scanCommands: MAKECMDGOALS := $(MAKECMDGOALS: param2 = )
endif

....


.done: 
     $(CC) $(FLAGS) source.c

but unfortunately MAKE doesn't accept this:

Code:

ifneq (,$(findstring param1,$(MAKECMDGOALS)))
.scanCommands: FLAGS += -DFLAG1
.scanCommands: MAKECMDGOALS := $(MAKECMDGOALS: param1 = )
endif

or, better, accept it but not in the way I was expected: it executes the goal in the 'if' branch always...

BrownB