GNU make to uncompress and compile?

**HarryU** · 04-02-2011

Hi all!

I'm just getting started with Unix, C and somebody suggested me to use GNU make too. So I thought of doing that.

One thing I tried to do is to uncompress a .gtz file and compile the C files inside it with few flags on. Here's my code if you don't laugh.

What I'm trying to do here is to uncompress lab.tgz file and compile the C source files inside it.

Code:

CC=gcc
FLAGS=-l./-O3 -Wall -c

all:
	tar -xzvf lab.tgz
	cd lab

CFILES = $(shell ls /lab  | grep .c)
OBJS = $(CFILES:%.c=%.o)

main : $(OBJS)
	$(CC) $(FLAGS) $(OBJS) -o main

$(OBJS):$(CFILES)
	$(CC) $(FLAGS) $(OBJS)

Obviously, this is not working. I want the assignments

Code:

tar -xzvf lab.tgz

to be executed before

Code:

CFILES = $(shell ls /lab  | grep .c)

But the second one executed earlier and complains that /lab does not exist. I'll be really thankful if somebody help me with this.

Thanks

**MK27** · 04-02-2011

Originally Posted by HarryU

What I'm trying to do here is to uncompress lab.tgz file and compile the C source files inside it.

I'm a manual "make" neophyte too; I don't know if there is a way to do exactly what you want, but I think even if there is it will be messy, awkward, and unconventional.

I can tell you why this does not work:

Code:

all:
	tar -xzvf lab.tgz
	cd lab

CFILES = $(shell ls /lab  | grep .c)
OBJS = $(CFILES:%.c=%.o)

main : $(OBJS)
	$(CC) $(FLAGS) $(OBJS) -o main

Your default target here is "all", so it's worth observing that even if "make" had run, it would not have compiled anything. It would just have untar'ed an archive. After that you would have to run "make main".

But the reason it does not work is that before make tries to follow any directives, evidentially it defines all its variables (it could have left them undefined until needed but obviously this is not the case). A variable definition does not really contain any make directives, altho it may, as in your example, be the output of a shell command (maybe this is a subtle distinction?).

Conventionally, the makefile should be in the archive. Then the user untars the archive and runs the makefile inside. If you want to simplify that, you could use a shell script:

Code:

#!/bin/sh

tar -xzvf lab.tgz
cd lab
make

If there is a reason you need to run make in the parent directory (there is not if there is nothing to compile there), you can do the same thing as the above script with this makefile:

Code:

all:
    tar -xzvf lab.tgz
    cd lab && make

Nb. that cd in a makefile only works in the context of the current line -- hence the use of "&&". Putting "cd lab" and "make" on separate lines will not work because of how make interacts with the shell.

This still means you have your primary makefile tarred in "lab". If you can't place anything in lab.tgz, put the makefile on the outside (as, eg, "makefile.2") then copy it in with your shell script (or tiered makefile) first:

Code:

tar -xzvf lab.tgz
cp makefile.2 lab/makefile
cd lab && make

Very honestly: that will be much easier that placing all the directives in a parent directory which does not contain any source files.

**anduril462** · 04-02-2011

You can let make handle the change of directory for you by doing

Code:

make -C lab    # make the default target in lab/Makefile
make -C lab foobar    # make the foobar target in lab/Makefile

which changes to the lab directory and runs the default make target.

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